Numerous types of electronic devices are common place and are utilized by people for a variety of functions in their everyday life. At the heart of many of these devices are integrated circuits or chips that contain electronic circuitry designed to perform a required function. For example, many modern electronic devices include a microprocessor or a digital signal processor, both of which are examples of integrated circuits or chips. A chip includes a semiconductor die in which the electronic circuitry is formed. The semiconductor die is physically mounted to a package including a number of electrical leads. In addition to being physically mounted to the package, the electronic circuitry in the semiconductor die is electrically coupled to the electrical leads of the package. The electronic circuitry formed on the semiconductor die may in this way be coupled through the package and electrical leads to the electronic circuitry of another chip.
To interconnect the semiconductor die to the electrical leads of the associated package, bonding pads are formed on a surface of the semiconductor die. The actual interconnection between each bonding pad and a corresponding electrical lead may be done in different ways. For example, in some chips each bonding pad and a corresponding electrical lead are interconnected through a very fine gold or aluminum bonding wire. Although other interconnection methods exist, such as flip-chip bonding, interconnection through a bonding wire will be assumed in the present description merely for ease of explanation. The bonding pads are typically metallic and provide a point for electrically coupling a portion of the electronic circuitry formed in the semiconductor die to the electrical leads of the package. Thus, each bonding pad may be viewed as providing an input to or an output from the electronic circuitry in the semiconductor die. As a result, associated with each bonding pad is a driver that includes electronic circuitry which functions to either receive an input signal applied to the bonding pad and provide that signal to other circuitry on the semiconductor die or to apply an output signal on the bonding pad in response to signals from other circuitry on the semiconductor die.
The bonding pads along with their associated drivers are typically located around a periphery of the semiconductor die to simplify the electrical interconnection between each bonding pad and the associated electrical lead. FIG. 1 is a simplified top view of the conventional formation of drivers D1-D3 and the associated bonding pads BP1-BP3 on a semiconductor die. Only the three drivers D1-D3 and the associated bonding pads BP1-BP3 are shown merely for ease of description, and there would actually be many more drivers and bonding pads formed on a typical semiconductor die. Because the electronic circuitry forming each of the drivers D1-D3 must be electrically coupled to the corresponding bonding pad BP1-BP3, the drivers are physically located near the bonding pads. In the following description, when utilizing reference descriptors such as D1-D3 and BP1-BP3 that include both letters and numbers, the number may be omitted when referring to any or all of the components associated with the reference descriptors, meaning the drivers and bonding pads in this situation. Only when referring to a specific one of the components will both the letters and numbers typically be utilized. The same is true of other reference descriptors utilized below with reference to other figures of the present application.
Each of the bonding pads BP has a width W1 in the example of FIG. 1. The width W1 of the bonding pads BP must have some minimum value to allow for reliable connection of the bonding wire to the bonding pad that provides electrical interconnection to the corresponding lead on the package. As the electronic circuitry formed in semiconductor dies becomes more sophisticated, more electrical interconnections to the circuitry are required and thus more bonding pads BP must be formed on each semiconductor die. For example, electronic circuitry formed on the semiconductor die typically includes a data bus and a width of this data bus is ever increasing to allow more bits of data to be transferred over the bus at a time, thus increasing the throughput of data transfer. Each additional bit being added to the data bus requires a corresponding bonding pad BP, and therefore as the width of the data bus increases more bonding pads are required.
Simply adding more bonding pads BP and associated drivers D is not a straightforward option in many situations since these additional pads and drivers occupy valuable space on the semiconductor die. FIG. 2 is simplified top view of drivers D1-D3 and associated bonding pads BP1-BP3 in a double-staggered pattern on a semiconductor die to reduce the space on the semiconductor die occupied by these components. In this approach, a width DW of the drivers D is reduced relative to the width W of the drivers D in FIG. 1 and the bonding pads BP are alternately offset or “staggered.” Although the width DW of the drivers D is reduced, meaning a reduced pitch between drivers, as previously mentioned the bonding pads BP must have a minimum size to allow for reliable connection of the associated bonding wire and thus the bonding pads in figure to have the same width W as the bonding pads in FIG. 1. By reducing the width DW of the drivers D and staggering the bonding pads BP, the overall area on the semiconductor die occupied by these components is reduced. This is seen by noting that in FIG. 2 to three drivers D1-D3 and associated bonding pads BP1-BP3 occupy an overall width D2 that is less than an overall width D1 occupied by the three drivers D1-D3 and associated bonding pads BP1-BP3 in FIG. 1.
With the double-stagger approach of FIG. 2, each bonding pad BP must be electrically connected to the corresponding driver D through a conductive trace 200 that is commonly referred to as a “neck.” This is also true of other staggered approaches, such as a triple stagger, as will be appreciated by those skilled in the art. The necks 200 interconnecting the bonding pads BP and their associated drivers D consume valuable area on the semiconductor die that could otherwise be utilized for forming other components. Thus, while the double-stagger approach reduces the space occupied by the drivers D and bonding pads BP in a horizontal direction (i.e., D2<D1), the necks 200 necessitated by this approach result in a waste of valuable area in a vertical direction (i.e., in a direction parallel to the necks 200).
There is a need for a system and method of reducing the space on the semiconductor die occupied by bonding pads and their associated drivers.